The present invention relates to network processors. More specifically, the present invention relates to a system for providing improved network data flow rates, while providing error checking at individual network routers.
FIG. 1 provides a typical configuration of a computer network. In this example, a plurality of computer systems 102 are connected to and are able to communicate with each other, as well as the Internet 104. The computer systems are linked to each other and, in this example, the Internet by a device such as a router 106. The computer systems 102 communicate with each other using any of various communication protocols, such as Ethernet, IEEE 802.3 (Institute of Electrical and Electronics Engineers 802.3 Working Group, 2002), token ring, and Asynchronous Transfer Mode (ATM; Multiprotocol Over ATM, Version 1.0, Jul. 1998). Routers 106, among other things, insure sets of data go to their correct destinations. Routers 106 utilize network processors (not shown), which perform various functions in the transmission of network data, including data encryption, error detection, and the like.
As flow rates improve for network devices, it is necessary to eliminate bottlenecks adversely affecting overall network flow. Data error checking is calculation-intensive and thus, can greatly affect a router's performance with regard to flow rate. It is therefore desirable to have an improved system for network processor error checking that increases a router's potential bandwidth.